Conventionally, analog copying machines, and digital copying machines which process digitalized image data are known. Moreover, now a days integrated digital machines that integrates, facsimile, printer, and scanner with the copying machine, have appeared in market.
FIG. 15 shows a block diagram of one embodiment of a hardware configuration for a digital integrated machine according to a conventional technique. As shown in FIG. 15, the digital integrated machine 1500 has realized all the functions as a digital integrated machine by the following configuration, wherein: component parts as a copy machine (copy machine parts) comprises a series of component parts such as a read unit 1501; an image processing unit 1502; a video control unit 1503; a write unit 1504, and further a memory control unit 1505; and a memory module 1506, and the component parts are additionally connected, through a motherboard 1511, to, for example, a facsimile control unit 1512; a printer control unit 1513, and a scanner control unit 1514.
That is, functions of a digital integrated machine have been realized by one system comprising a series of the component parts. Specifically, the facsimile control unit 1512, the printer control unit 1513, and the scanner control unit 1514 are added to the copy machine units for which a series of operations are controlled by a system controller 1507, RAM 1508, and ROM.
Moreover, there have been proposed another digital integrated machine (not shown) which efficiently processes image data input from each unit shown above by a configuration where the copying function unit, the facsimile function unit, the printer function unit, and so on are made as one unit, respectively, and the units made above are integrated, not depending on the addition of the units onto the copying machine.
Transfer control of image data has become a very important element along with increase in the functions of the digital integrated machine in order to improve the system performance, whether the digital integrated machine has a configuration in which the function units are added through the motherboard, or the one in which each independent function unit are combined without dedication to the copying machine.
Therefore, image data have been conventionally compressed as required from a viewpoint of transfer control, that is, considering the efficiency of image data transfer between function units, and that of storage of memories and so on in the storage unit. In other words, the digital integrated machine has improved its performance by compression of the image data.
A conventional data compression unit to compress image data will be described below. FIG. 16 shows a block diagram of one embodiment for a configuration of a conventional data compression unit, and FIG. 17 an explanatory view of a processing timing for the configuration.
In FIG. 16, a data compression unit 1601 comprises a storage unit 1602 to store image data; a compression device 1603 to compress image data; and a control unit l604 to control the storage unit 1602 and the compression device 1603. The above storage unit 1602 comprises a line memory group 1605 having a plurality of 1-port FIFO memories FM1a, FM1b, FM2, FM3, and FM4; an output switch 1606 to switch the output end of image data; and an input switch 1607 to switch the input end of image data between the FIFO memories FM1a and FM1b. 
Moreover, in order to simplify the description, a compression area for compression with the compression device 1603 is assumed to be a rectangular area of four lines×four pixels per one line having four pixels in the main scanning (pixel) direction, and four lines in the sub scanning (line) direction, as shown in FIG. 18.
As shown in FIG. 17, in order to compress image data, the image data of the first line of a rectangular area is written (perform “write”) into the FIFO memory FM1a, in the first place. Thereafter, the image data of the second line, that of the third line, and that of the fourth line are sequentially written into the FIFO memories FM2; FM3; and FM4, respectively. The above division of the image data is performed by the output switch 1606 under control of the control unit 1604.
Four lines of data to be compressed at the compression device 1603 get ready at a stage where image data have been written in the FIFO memory FM4. Thereafter, the image data of the fourth line are read from those of the first line stored in the FIFO memory FM1a, FM2, FM3, and FM4 (read) to send them to the compression device 1603. The above sending control is performed by the control unit 1604. The above compression device 1603 compresses the four lines of the image data, which have been input, to output the compressed image data. The above compressed image data are stored in the memory module 1506, after passing through the memory control unit 1505.
On the other hand, after the image data of the fourth line are written in the FIFO memory FM4, the image data of the first line (the image data of the fifth line) in the next rectangular area are input. The control unit 1604 performs write control of the image data of the fifth line in the FIFO memory FM1b for conflict avoidance in the memory use.
After the, the image data of the sixth line, those of the seventh line, and those of the eighth line are sequentially written in the FIFO memory FM2, FM3 and FM4, respectively.
The control unit 1604 reads the image data of the eighth line from those of the fifth line stored in the FIFO memories FM1b, FM2, FM3, and FM4 to send them to the compression device 1603, while performing the write control of the image data of the ninth line in the next rectangular area in the FIFO memory 1a. A series of image data sequentially input may be compressed without any problems by repetition of the processing.
Moreover, 2-port FIFO memories may be used, though each FIFO memory is a 1-port FIFO memory in the embodiment. FIG. 19 shows a view of one embodiment of a configuration of a data compression unit using the 2-port FIFO memory for apart, and FIG. 20 shows an explanatory view of the processing timing. As a data compression unit 1901 has the similar configuration to that of the data compression unit 1601, except replacement of the FIFO memories FM1a, and FM1b of the data compression unit 1601, and the switch 1607 by a 2-port FIFO memory FMD1, the description will be eliminated.
It is shown in FIG. 20, as an operation of the data compression unit 1901, that image data of the first line to the fourth line, which are stored in the FIFO memories FMD1, FM2, FM3, and FM4, are read, and sent to a compression device 1903 after writing the image data of the fourth line in the FIFO memory FM4. Along with the read control, the image data of the next fifth line are written in the FIFO memory FMD1.
Similarly, while the image data of the ninth line are written in the FIFO memory FMD1, the image data of the fifth line to the eighth line, which are stored in the FIFO memories FMD1, FM2, FM3, and FM4, are read, and sent to the compression device 1903 after storing the image data of the eighth line in the FIFO memory FM4.
Thereby, one 1-port FIFO memory may be eliminated, and a series of image data sequentially input may be compressed without any problems by using one 2-port FIFO memory for a part of the FIFO memories.
On the other hand, the compressed image data are expanded, as required, for the subsequent operations. Especially, in the digital integrated machine, there have been many cases where the compressed image data stored in the memory module 1506 are required to be expanded, based on the varieties of the functions.
A conventional data expansion unit to expand image data will be described. FIG. 21 shows a block diagram of one embodiment of a conventional configuration of a data expansion unit, and FIG. 22 an explanatory view of the processing timing.
In FIG. 21, a data expansion unit 2101 comprises: an input side storage unit 2102 to input compressed image data; an expansion device 2103 to expand image data; an output side storage unit 2104 to store the expanded data; and a control unit 2105 to control the input side storage unit 2102, the expansion device 2103, and the output side storage unit 2104. Here, it is assumed in order to simplify the description that image data compressed every image data of a rectangle area with four lines×four pixels per one line are expanded.
The input side storage unit 2102 comprises: two 1-port FIFO memories FMI1 and FMI2 to store compressed image data in the rectangular area; and an output switch 2106 to send the compressed image data in the rectangular area to the FIFO memory either FMI1 or FMI2 by switching.
The output side storage unit 2104 comprises; a memory group 2107 having three 1-port FIFO memories FM1, FM2, and FM3 and one 2-port FIFO memory FMD4; and an input switch 2108 to switch the input end of the image data output from the memory group 2107.
In the first place, compressed image data in a rectangular area are sent to the FIFO memory FMI1, for expansion of image data, as shown in FIG. 22. The above compressed image data are sent to the expansion device 2103 for batch expansion of them to four lines of image data of the first line to the fourth line. The expanded image data of the first line, that of the second line, that of the third line, and that of the fourth line are written into the FIFO memories FM1; FM2; FM3; and FMD4, respectively.
Thereafter, image data of the first line to the fourth line which are stored in the FIFO memories FM1, FM2, FM3, and FMD4, are sequentially read and sent to a predetermined output destinations, according to a line data output synchronous signal (not shown). On the other hand, compressed image data of the fifth line to the eighth line stored in the FIFO memory FMI2 are expanded in the expansion device 2103, and stored in the FIFO memories FM1 to FMD4. During the time, reading of the fourth line and writing of the eighth line are controlled so as to be simultaneously performed in the FIFO memory FMD4. Therefore, the FIFO memory FMD4 is configured to be a 2-port FIFO memory to simultaneously perform read and write.
Thereby, one 1-port FIFO memory may be eliminated in a similar way to that of the data compression unit 1901 and the image data may be continuously sent without any problems after expansion of a series of image data sequentially input, when one 2-port FIFO memory is used for a part of the FIFO memories.
As described above, in a conventional image processor (digital integrated machine), improved efficiency in the transfer control has been required in order to improve the system performance, and, then, the data compression unit and the data expansion unit, before and after which proper line memories are installed, have been provided for achievement of the requirement.
Moreover, for example, a “Image processor” (for example, Japanese published unexamined application HEI8 (1996)-274986), which performs simultaneous operation of a plurality of functions such as image processing of read signal, and image storage into memories, and realizes the best efficiency in each function, has been disclosed, and in some case, various kinds of functions for image processing have been realized by one configuration for image processing.
However, there have been the following problems. As mentioned above, the data compression unit or the data expansion unit has a configuration which comprises a plurality of line memories before and after the compression device or the expansion device. As for the line memories, one line memory is required to previously be designed so as to have larger capacity, and the number of the line memory is also required to be designed to be larger, as there are different kinds of capacities for input image data according to kinds and performances of added function units or combined function units.
Especially, a part of function units for the digital integrated machine, which combines each function unit, are required to be exchanged for meeting improved functions in some case. Therefore, one line memory is required to be designed so as to have larger capacity, and the number of the line memory is also required to be designed to be larger, according to the circumstances.
For example, when a manuscript is read at 600 dpi (dots per inch) per one line with 8 bits per one pixel, line memories with 8 bits×8 k words are required for storage of one line of image data as about 8K (1K=1024) are required for the longitudinal direction of the A4 size.
That is, in an image processor (digital integrated machine) according to conventional technologies, there has been a problem that the circuit size becomes larger, as the number of the line memory is also required to be larger, and the one line memory is required to have larger capacity. There were problems that the circuit size of the 2-port FIFO memory is still larger, compared with that of a 1-port FIFO memory, even when one 1-port line memory may be eliminated (See FIG. 19 and FIG. 21) by using a 2-port FIFO memory as a line memory.
In addition, in the case of the digital integrated machine which combines each function unit, the circuit size is required to be as small as possible at the design stage, and, then, the size of the function unit including the data compression unit or the data expansion unit is required to be as small as possible, too, as the machine is used under combination with other function units.